The present invention relates to the field of programmable devices, and the systems and methods for programming the same. Programmable devices, such as FPGAs, typically includes thousands of programmable logic cells that use combinations of logic gates and/or look-up tables to perform a logic operation. Programmable devices also include a number of functional blocks having specialized logic devices adapted to a specific logic operations. The logic cells and functional blocks are interconnected with a configurable switching circuit. The configurable switching circuit selectively routes connections between the logic cells and functional blocks. By configuring the combination of logic cells, functional blocks, and the switching circuit, a programmable device can be adapted to perform virtually any type of information processing function.
A typical design cycle for determining the configuration of a programmable device, referred to compilation, starts with an extraction phase, followed by a logic synthesis phase, a fitting phase, and an assembly phase. The extraction phase takes a user design, typically expressed as a netlist in a hardware description language such as Verilog or VHDL, and produces a set of logic gates implementing the user design. In the logic synthesis phase, the set of logic gates is permuted over the hardware architecture of the programmable device in order to match elements of the user design with corresponding portions of the programmable device. The fitting phase assigns the various portions of the user design to specific logic cells and functional blocks and determines the configuration of the configurable switching circuit used to route signals between these logic cells and functional blocks, taking care to satisfy the user timing constraints as much as possible. In the assembly phase, a configuration file defining the programmable device configuration is created. The configuration can then be loaded into a programmable device to implement the user design.
In addition to implementing their desired functions, user designs typically must satisfy one or more additional design goals, such as operating speed, power consumption, and/or programmable device resource consumption. One or more compilation phases often optimize the user design during compilation to achieve these design goals. Generally, optimization of a user design requires choosing one configuration of the user design from numerous possible alternative configurations. To choose the optimal configuration of the user design, the compilation phase generally must identify potential problem areas of the user design to predict how well a given configuration of a user design satisfies its design goals.
For compilation phases at the beginning of the compilation process, identifying problem areas of the user design is difficult. Many portions of the configuration that will greatly affect the overall performance of the user design are determined by subsequent compilation phases. Thus, the earlier compilation phases must try to predict the likely results of subsequent compilation phases to determine the portions of the user design that require optimizations and the types of optimizations required for these portions. This prediction is often difficult and time-consuming. Furthermore, many compilation phases have a large degree of random variability in their output, making accurate predictions of the behavior even more difficult. As a result, the earlier compilation phases often determine a less than optimal configuration of the user design, which forces the later compilation phases to perform additional optimizations to satisfy the design goals of the user design. Alternatively, the user design can be recompiled using information from a previous compilation to apply more suitable optimizations in an early compilation phase. However, the random variability of subsequent compilation phases often renders these optimizations moot. As a result, these approaches are very time-consuming and often provide unsatisfactory results.
It is therefore desirable for a system and method to provide improved estimates of the performance of the user design following subsequent compilation phases. It is further desirable for the estimates of the user design performance to account for the random variability of subsequent compilation phases. It is also desirable for the system and method to integrate easily with existing compilation phases.